How to enable Core Performance Boost on AMD platforms?
Pushing hardware to its limits
In the epoch of efficient and fast processors, performance becomes one of the
most crucial aspects when choosing and working with hardware. We want our
computers to execute their tasks with possibly highest speeds. But what really
influences the performance of our platforms? It’s the processor’s manufacturer
design one may say. In this post, I will show You how firmware may boost Your
silicon to higher performance level. On the example of PC Engines apu2c4
platform, I will present Core Performance Boost feature.
Core Performance Boost
Core Performance Boost (CPB) is a feature that allows increasing the frequency
of the processor’s core exceeding its nominal values. Similarly to Intel’s
Turbo Boost Technology, AMD Core Performance Boost temporarily raises the
frequency of a single core when the operating system requests the highest
processor performance.
Enabling the CPB feature is relatively easy since coreboot uses proprietary
initialization code from AMD for the apu2 processor called AGESA, which have
support for CPB initialization.
In order to enable CPB feature one must add following lines to OEM Customize
in src/mainboard/pcengines/apu2/OemCustomize.c:
These values will be passed to AGESA, which will handle initialization of the
CPB feature.
Performance tests
How to prove the performance gain without tests and benchmarks? First of all,
I have performed a few tests using memtest86+ in BIOS and Linux OS utilities
like stress/stress-ng, dd etc. Furthermore, I have launched one benchmark in
order to show how performance increased by enabling the CPB feature.
All test have been performed on Debian Linux installed on mSATA SSD:
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Linux apu2 4.9.0-8-amd64 #1 SMP Debian 4.9.130-2 (2018-10-27) x86_64 GNU/Linux
CPB disabled
First, let’s try reference v4.9.0.1 firmware without CPB:
I have also selected the UnixBench
to test the processor performance.
How to run:
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# it may be necessary to install few packages
apt-get install libx11-dev libgl1-mesa-dev libxext-dev perl perl-modules make git
git clone https://github.com/kdlucas/byte-unixbench.git
cd byte-unixbench/UnixBench/
./Run
We can see that the speed increased from ~2.5Gb/s to ~3.0Gb/s (~20% increase).
Compared to the results without CPB enabled, these actually prove that the
feature works, because when the boost is on, the core frequency should
increase, along with performance.
We clearly see that the overall score has increased:
for 1 parallel copy of tests score increased from 258.7 to 310.2 (20% change)
for 4 parallel copy of tests score increased from 688.9 to 689.8 (~0% change)
Summary
Enabling the CPB feature resulted in the performance increase and my
experiments show, that it is true. Although some methods did not report any
change, it is still software which may not report it correctly. stress and
stress-ng seems not to be the right tools to measure the performance.
Another reason of wrong reports is that the core performance states (P-states)
in boosted mode are not described in ACPI (Advanced Configuration and Power
Interface) system (and they shouldn’t be as AMD BIOS and Kernel Developer Guide
states). As a result operating system does not know about the fact of
processor’s transition to the state with higher, boosted performance.
CPB feature increases frequency only of one single core if the rest of the
cores is not stressed. The overall boost result is 20%, which implies the
frequency increase from 1000MHz to 1200MHz. However, the processor
specification states, that the frequency should be 1400MHz. A similar result
has been achieved with memtest86+ (approximately 40% memory speed gain). The
benchamrk result is also biased by the background operations that OS must do
besides the tests.
The feature will be introduced in v4.9.0.2 firmware release for PC Engines.
I hope this post was useful for you. Please try it out yourselves and feel free
to share your results.
If you think we can help in improving the performance of your platform or you
looking for someone who can boot your product by leveraging advanced features
of used hardware platform, feel free to boot a call with us
or drop us email to contact<at>3mdeb<dot>com. Are You interested in similar
content? Feel free to sign up to our newsletter
Firmware Engineer with networking background. Feels comfortable with low-level development using C/C++ and assembly. Interested in advanced hardware features, security and coreboot. Core developer of coreboot. Maintainer of Braswell SoC, PC Engines, Protectli and Libretrend platforms.
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